1. Field of the Invention
This invention relates to memory arrays and, more particularly, to methods and apparatus for updating electrically-erasable programmable read only memory (EEPROM) which furnishes processes for a microprocessor which controls the operations of the memory array.
2. History of the Prior Art
Modern computer systems make extensive use of long term memory. Typically this memory is provided by one or more electro-mechanical hard (fixed) disk drives. Hard disk drives are very useful and have become almost a necessity to the operation of personal computers. However, such electro-mechanical drives are relatively heavy, require a significant amount of space within a computer, require a significant amount of power in use, and are very susceptible to shock.
Recently, forms of long term storage other than electro-mechanical hard disk drives have become feasible for use in computers. One of these is flash EEPROM. A flash EEPROM memory array includes a large plurality of floating-gate field effect transistors arranged as memory cells in typical row and column fashion with circuitry for accessing the individual cells and placing the memory transistors of those cells in one of two memory conditions. A flash memory cell, like a typical EPROM cell retains information when power is removed but is capable of being programmed in place within the array. Flash EEPROM memory has a number of characteristics which adapt it to use as long term memory. It is light in weight, occupies very little space, and consumes less power than electro-mechanical disk drives. More importantly, it is especially rugged. It will withstand without adverse effects repeated drops each of which would destroy a typical electro-mechanical hard disk drive.
One memory arrangement using flash EEPROM which replaces a typical electro-mechanical hard disk drive includes a control circuit which controls the reading, writing, and erasing of the entire array. This control circuit includes a microprocessor which receives commands from a host computer and runs various processes stored in read only memory in the control circuit in order to manage the memory array. These processes implement operations which enable the array to make better use of its storage space, to read data more accurately, to control defects, to erase in the background, and to conduct many other services for the flash EEPROM memory array. In one embodiment of the control circuit, the read only memory in which these control processes are stored is flash EEPROM. It is desirable to provide processes by which the processes stored in read only memory and used to control the various operations of the flash EEPROM memory array may be changed and updated while the flash EEPROM memory array remains in place within the host computer.